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_mm512_extstore_epi64/_mm512_mask_extstore_epi64

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Stores with conversion of int64 vector. Corresponding instruction is VMOVDQA64. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).

Syntax

Without Mask

extern void __cdecl _mm512_extstore_epi64(void* mt, __m512i v1, _MM_DOWNCONV_EPI64_ENUM conv, int hint);

With Mask

extern void __cdecl _mm512_mask_extstore_epi64(void* mt, __mmask8 k1, __m512i v1, _MM_DOWNCONV_EPI64_ENUM conv, int hint);

Arguments

v1

source vector to store elements from

conv

Type of conversion, which can be one of the following:

  • _MM_DOWNCONV_EPI64_NONE - no conversion

k1

vector mask to select elements to add to the stream

mt

memory location to store vector elements

hint

Hint that indicates to the processor that the data is non-temporal. Takes the value 0 or 1, where:

  • _MM_HINT_NONE = 0
  • _MM_HINT_NT = 1 (Store is non-temporal)

Description

Converts 64-bit integer elements of the int64 vector v1 to a smaller type, specified by the conv parameter, and stores converted elements to the memory address mt with non-temporal hint hint. The type and the size of elements stored to memory depend on the parameter conv .

In the masked variant, only those elements with the corresponding bit set in vector mask k1 are converted and stored to memory. Elements in the destination memory vector with the corresponding bit clear in k1retain their previous value.

Note

This intrinsic requires the memory address mt to be aligned to the data size granularity dictated by the conv parameter. In current implementation, since no conversion is allowed, the alignment must be 64 bytes.

Returns

Returns nothing.

Inglés

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