Multiply and subtract float32 vectors. This intrinsic only applies to Intel® Many Integrated Core Architecture (Intel® MIC Architecture).
Syntax
Without Mask extern __m512 __cdecl _mm512_fmsub_ps(_m512 v1, __m512 v2, __m512 v3); extern __m512 __cdecl _mm512_fmsub_round_ps(_m512 v1, __m512 v2, __m512 v3, int rc); |
With Mask extern __m512 __cdecl _mm512_mask_fmsub_ps(_m512 v1, __mmask16 k1, __m512 v2, __m512 v3); extern __m512 __cdecl _mm512_mask_fmsub_round_ps(_m512 v1, __mmask16 k1, __m512 v2, __m512 v3, int rc); extern __m512 __cdecl _mm512_mask3_fmsub_ps(_m512 v1, __m512 v2, __m512 v3, __mmask16 k1); extern __m512 __cdecl _mm512_mask3_fmsub_round_ps(_m512 v1, __m512 v, __m512 v3, __mmask16 k1, int rc); |
Parameters
Description
Performs an element-by-element multiplication between float32 vector v1 and the float32 vector v2, then subtracts the float32 vector v3 from the result. Intermediate values are calculated to infinite precision, and are not truncated or rounded, unless you specify the rc parameter.
The masked variant has one additional argument: k1. Only those elements in source registers with the corresponding bit set in vector mask k1 are used for computing. When a write mask is used, the pass-through values come from the vector parameter immediately preceding the mask parameter. For example, for _mm512_mask_fmsub_ps(v1, k1, v2, v3) the pass-through values come from v1, while for _mm512_mask3_fmsub_ps(v1, v2, v3, k3) the pass-through values come from v3. To get the pass-through values from v2, reverse the order of v1 and v2 in the _mask_ form.